Often, a voltage regulator is designed to incorporate a trimming scheme at the internal voltage reference circuit and/or at its output circuit. These traditional designs are sought for various applications including supplying a reference voltage for an analog-to-digital converter (ADC), providing a voltage reference circuit permitting a user to select a voltage internally generated by the circuit, or applying a different externally generated voltage through the integrated circuit pins. A trimming scheme is typically desired to trim the internally generated voltage to ensure that it is within the planned or designed voltage tolerance. Trimming may be necessary in these traditional designs as often typical variations arising during fabrication can result in certain of the fabricated integrated circuits (i.e., ICs, wafers, fabricated circuits, etc.) to have performance attributes which generate inaccurate voltage levels in operation. The resulting trimming may involve 2, 3, or more pins on the circuit to correct the voltage inaccuracy by receiving an external voltage source, providing an output for the internally generated voltage, and receiving trimming voltages used to trim the internally generated reference, for instance.
Various trimming techniques are known in the art such and include laser-trimming, digital potentiometers, using either resistors fabricated alongside active devices on an integrated-circuit die or trimmable discrete devices, and implementing a rejustor. Other trimming schemes may include flash memory based programmable logic approaches that require dedicated footprint or area of the integrated circuit. Further, programmable logic trimming techniques further require an accurately programmed logic to ensure trimming is limited to the necessary limits. However, common to each of these traditional techniques is added production burdens on resources of time, cost and/or pins of an integrated circuit, the latter of which is often at a premium in modern designs.
Unfortunately, each of these traditional techniques also typically requires extensive testing at the wafer level which accounts for a substantial portion of the product development cost of a wafer fabrication process.
FIG. 1 sets forth a simplified depiction of a bandgap circuit known as a Brokaw bandgap cell (without any start-up circuit) 100 which is typically implemented in low dropout (LDO) and switch-mode regulators. The Brokaw cell is a bandgap voltage reference circuit based on the addition of two voltages having equal and opposite temperature coefficients (TC). The first voltage is a base-emitter voltage of a forward biased bipolar transistor. In a typical Brokaw cell (i.e., bandgap cell or circuit), the first voltage has a negative TC of about −2.2 mV/C and is usually denoted as a Complementary to Absolute Temperature (CTAT) voltage. The second voltage, which is a Proportional to Absolute Temperature (PTAT) voltage, is formed by amplifying the voltage difference of two forward biased base-emitter junctions of bipolar transistors operating at different current densities. In general, bandgap circuits, and in particular the Brokaw bandgap cells, are well known in the art and understood that the bandgap circuit produces a voltage, VBG, at 199, to a first order, which is temperature and supply independent and approximately equal to the silicon bandgap voltage of 1.2 Volts.
The cell of FIG. 1 uses MOS devices in high gain differential amplifiers (M9 and M10) (130 and 140, respectively), which contribute to higher mismatches and higher offsets for the circuit. These higher mismatches and higher offsets result in higher levels of inaccuracy in the bandgap circuit. When the bandgap reference is inaccurate, the output voltage of the regulators are also inaccurate, and thereby require trimming of the bandgap voltage and typically the output voltage (i.e., output voltage of circuit) as well.
The bandgap voltage accuracy in circuits similar to the traditional circuit of FIG. 1 is dependent upon the offset voltages of the bipolar devices (Q1 and Q2) (110 and 120, respectively) and metal-oxide-semiconductor field-effect (MOSFET) (M9 and M10) (130 and 140, respectively) devices. The predominant sources of offset error in the bipolar devices in these circuits include base width, base doping level, collector doping level and mismatches in effective emitter area. For metal-oxide semiconductor (MOS) type devices, the predominant sources of offset error are threshold voltage mismatch and the ratio of the effective channel width W over effective channel length L (W/L) for a given layout area (WL). Similarly, in yet other typical circuits involving modern BiCMOS process, the offsets in MOS devices are typically one order of magnitude higher than bipolar devices (where BiCMOS, also termed as BiMOS, refers to the integration of bipolar junction transistors and CMOS technology into a single device).
The bandgap circuit of FIG. 1 is therefore recognized to require resistor trimming in an attempt to improve bandgap voltage accuracy of the circuit. To improve upon the bandgap voltage inaccuracies arising with the traditional bandgap circuit, typically, resistor blocks or a plurality of resistors, reside at R1 and R2 (150 and 160, respectively). In combination with these resistors R1 and R2 (150, 160), often referred to as “trim resistors,” is typically associated a plurality of diodes (not shown) in circuit connectivity. Each diode of the plurality is directly associated through circuit connectivity with a particular resistor in the resistor block (150, 160). In certain testing situations, one or more of these diodes, for traditional bandgap circuits, are shorted or “zapped” in a predetermined manner in order to thereby short an associated resistor in response to determination that the bandgap voltage of the circuit is inaccurate. When the associated resistor is shorted, the resulting bandgap voltage is reassessed with the shorted resistor and the bandgap voltage inaccuracy is lessened. This process is typically iteratively repeated for each circuit being assessed, often resulting in a plurality of resistors being shorted and the entire process per circuit becoming a lengthy, involved and expensive process.
FIG. 2 shows the variation of bandgap voltage (VBG) over temperature 200 for a traditional bandgap cell, like the Brokaw cell of FIG. 1. From FIG. 2, the VBG varies 6 mV over the temperature range of −40° C. to 125° C. along 210. As is understood by those skilled in the art, additional bandgap voltage accuracies often result in traditional circuits from heat related effects on associated electronic circuitry.
As continues to be understood in the art, the necessity of trimming bandgap cells remains a costly and time-consuming effort. Accordingly, it is desired to eliminate the need for bandgap circuit trimming, reduce testing time, and lessen associated expenses, while improving the bandgap voltage accuracy of bandgap type produced circuits. It is also desired to mitigate heat effects in related circuitry so as to reduce bandgap voltage inaccuracies. The present invention, in accordance with its various implementations herein, addresses such needs.